2.5G and 3G cellular phone power solutions

Users for their purchase of cellular phone generally have many requirements, duration and long standby time is clearly one of the most important two. Despite the current 2G cellular telephone can talk for hours and standby for several days, but the new 2.5G and 3G cellular products can not do it. The fact that Japan's early trials were found, some of 3G cellular phone in less than an hour out of power.

Designers should be aware of, solve this one problem answer depends not only on the cellular phone designed to simulate the part or the digital portion, to meet the end user power consumption requirements, design staff in the development of the next generation system must have a general power management solutions. This article will discuss in detail the system power consumption relates to each of the factors, analysis and design will be faced with the power management problem, and introduces the solution of the design problem of some potential solutions.

The main influence factors

In the discussion of specific details, let us briefly look at cellular phone must be carried out in the key part of the power management. Figure 1 is a typical 2.5G cellular phone design of the main power module.

Diagram of a typical 2.5G cellular telephone module power comparison

A transmit power amplifier design engineer is one of the main problems of power management, the power amplifier is very high peak current, sometimes nearly 1 amperes, therefore the components of mobile phone battery energy consumption than any other parts are much. Usually used in cases, power amplifier electric energy consumption nearly accounted for half of the energy of battery.

RF transceiver as power amplifier power consumption, but also for the designer to bring some power problems. On average, the transceiver to transmit or receive mode under the current consumed ranged from 50 to 100mA.

In addition to power, transceiver for designer to bring another challenge, namely from the cellular phone to other parts of the power supply received noise will greatly influence the whole performance of transceiver. Thus the designer must isolate the transceiver power, to cope with possible noise problems.

Includes audio codec, RF codec and power control function of the analog baseband device power consumption is not high, but must also provide clean power source can meet the performance requirements of mobile phone.

In addition to sending power amplifier, digital baseband device power consumption up, digital baseband IC power understanding more complex, because of the higher processor clock speed and wafer process related characteristics lead to a lot of other's. Generally speaking, can achieve high clock speed to meet the requirements of the application of wafer process, its off state leakage current is relatively high, this will cause by the logic switch and the formation of active power, and no matter whether the processor switches will consume power leakage components.

Lists the main power components of cellular phone, let us look at the designer to solve these problems by the use of the technology. We start from the digital baseband part.

Logical functional aspects

For battery powered or low power devices in different periods, the digital signal processor had advanced power management requirements, the main focus is to reduce the active power, the CMOS technology is the signal conversion as well as the design of node capacitance charge and discharge caused by power consumption. To reduce the dynamic power consumption part of effort has been focused on the clock control, because the clock is synchronized system the main source of inspiration.

Fig two microprocessor dynamic and static power consumption variation

System clock with automatic software control network is separated into separate clock domain has been the effective way to control the clock, the clock now new techniques such as dynamic power and frequency transform ( DVFS ) is also used in the DSP system, which can further reduce the active power loss.

DVFS allows a modular circuit operating voltage in the system faces onerous task increased, so that the clock frequency and voltage temporarily increased. It reduces the power consumption of the system principle is, under normal circumstances system circuit operating at a lower voltage and frequency mode, only through a large amount of data processing to go faster and higher power consumption mode. But it must be pointed out that, due to the technical development of main power supply voltage drops ceaselessly ( from 5 volts to 3.3 volts to 1.8/1.5 volts, is now to 1.2 volts and lower limit ) DVFS in synchronous circuit in real play, because the minimum and maximum working voltage becomes very close to.

Baseband structure static power control also has caused some new power control problem. Because of modern technology in the CMOS transistor static power consumption increased significantly, particularly in support of high performance operation, which is mainly due to meet the performance requirements must be reduced in size and geometry at the expense of the transistor threshold voltage, and the static portion ( or leakage current ) on electric source voltage level is very sensitive. Figure 2 shows a dynamic and static power consumption changes (using high performance transistor at maximum voltage ).

Now in the late development stage to reduce leakage current effect of the new technique utilizes a standby ( or " sleep " ) system, the power state or maintain all or part of the system state, either completely closed. In maintaining state, can be used to reduce working voltage method, but needs to be in memory and registers and other functions in some special application of biasing technique in the state; when closed, the system must be turned off in DSP module, these modules by electrical isolation to ensure that they are not affected by the remainder of the system operation effects.

A power leak also can be used as an indicator for a function, limitation of transistor count. Whether from the static or dynamic power consumption from the perspective of the transistor, is not without cost, so it is necessary to optimize the module, as far as possible using a minimum number of transistors.